1. Field of the Invention
The present invention relates to a semiconductor device and a display device, and more particularly to an alignment mark of a semiconductor device to be connected to a transparent substrate in a display device employing a Chip-on-Glass (COG) method.
2. Description of Related Art
In a display device employing a COG method, electrode terminals provided on a transparent substrate are connected with a driver IC (Integrated Circuit) for driving the display device. Hereinafter, the driver IC is referred to as the IC chip. Note that the COG refers to a technique in which the IC chip and the transparent substrate are directly connected to each other without interposing an FPC (Flexible Printed Circuit) or the like. The term “COG” will hereinafter be used as a generic term; however, the transparent substrate onto which the IC chip is to be mounted is not limited to glass, but may be plastic or the like. The transparent substrate is provided with electrodes for driving the display device, and the electrode terminals for supplying signals from the IC chip to the electrodes. Pads of the IC chip are connected to the electrode terminals through bumps, and output the signals for driving the display device to the electrodes. In the COG method, it is important to accurately align and connect the pads and the respectively corresponding electrode terminals when the IC chip and the electrode terminals are connected. In recent years, particularly, a circuit miniaturization has been significantly progressing, and an interval between the pads has become narrower. For this reason, only a slight misalignment between the pad and the corresponding electrode terminal causes a short circuit between the pads and an erroneous connection to an undesired electrode terminal.
In such the COG method, when the electrode terminals on the transparent substrate are connected to the pads on the IC chip, an alignment mark provided on the IC chip and that provided on the transparent substrate are detected from a side of the transparent substrate by a photo detector. Then, the IC chip and the transparent substrate are aligned such that positions of the both coincide with each other. The photo detector is required to accurately detect the alignment mark on the IC chip through the transparent substrate, so that the alignment mark is required to be easily recognizable.
A technique of an alignment mark provided on a semiconductor device is disclosed in Japanese Laid-Open Patent Application JP-P 2000-182914 A. In this technique, a wiring layer (an aluminum layer) is utilized to form a bright portion and a dark portion of the alignment mark. FIGS. 1A and 1B are schematic views showing a structure of the alignment mark 200 disclosed in JP-P 2000-182914 A. FIG. 1A is a plan view of the alignment mark 200 and FIG. 1B is a sectional view thereof along a line E-E′ shown in FIG. 1A. Referring to FIG. 1B, the alignment mark 200 is formed above an interlayer insulation layer 140 such as a SiO2 layer or the like on a silicon substrate 150. On the interlayer insulation layer 140, an interlayer insulation film 130 having a stripe pattern and a solid pattern is formed. On the interlayer insulation film 130, an aluminum layer 120 is formed, so that a fine stripe pattern and a solid pattern are formed on a surface of the aluminum layer 120 (see FIG. 1A). Note that a part of the aluminum layer 120 forming into the stripe pattern becomes a dark portion 202 because it scatters incident light, whereas the other part of the aluminum layer 120 forming into the solid pattern becomes a bright portion 201 that efficiently reflects the incident light in an incident direction. In addition, on the aluminum layer 120, a protective layer 110 for protecting the aluminum is provided.
Thus, according to the technique disclosed in this related art, the bright portion 201 and the dark portion 202 are formed by giving variety to geometry (layout pattern) of the aluminum layer 120, to thereby provide the easily recognizable alignment mark 200. Also, the alignment mark is formed by utilizing the aluminum layer 120, i.e., the wiring layer, so that the alignment mark can be formed simultaneously with the formation of the wiring layer in a circuit area, and therefore redundant steps for forming the alignment mark can be omitted.
Similarly to the above, a technique of an alignment mark utilizing a wiring layer (aluminum) is disclosed in Japanese Laid-Open Patent Application JP-P-Heisei 7-221166A. This alignment mark is a mark used for alignment in wafer dicing or lithography processing. The alignment mark is substantially formed of a high reflectivity pattern (bright portion) made of aluminum and the other low reflectivity pattern (dark portion) made of SiO2 exposed.
We have now discovered following facts. In any of the alignment marks disclosed in JP-P 2000-182914 A and JP-P-Heisei 7-221166 A, the aluminum surface having high reflectivity is used for the bright portion. However, along with miniaturization of IC chips of recent years, an antireflection film such as a titanium nitride film is formed on an aluminum wiring in a wiring layer. For this reason, the high reflectivity arising from the aluminum surface cannot be expected. In a process of manufacturing a semiconductor device, when PR (Photo Resist) exposure is performed after preparing metal wiring, the antireflection film is formed on a surface of the metal wiring to prevent a PR resolution from being reduced due to reflected light from the metal wiring surface. Obviously, a reflectivity of the surface of the antireflection film is smaller than that of the metal wiring surface. Alternatively, depending on a process to be used, a barrier metal stacked on the metal wiring surface may serve as the antireflection film.
Even if the antireflection film is removed to thereby ensure the reflectivity of the aluminum surface, aluminum formed by PVD (Physical Vapor Deposition) or the like has grains 200a as shown in FIGS. 1A and 1B. Since light is scattered by the irregular aluminum surface due to the grains 200a, reflectivity of the irregular aluminum surface remarkably decreases as compared with that of an ideally flat aluminum surface. That is, a difference in reflectivity from the surrounding dark portion becomes small, and therefore a contrast ratio is reduced. For this reason, in the disclosed technique, it is difficult to detect the alignment mark with naked eyes or a photo detector, and therefore it is difficult to execute a highly accurate alignment. In particular, in a case where the IC chip is mounted on a display panel based on the COG method in which the alignment mark is detected through the transparent substrate, it is important to increase the contrast ratio of brightness to darkness of the alignment mark.